Features
125 Watts Peak Pulse Power per Line (tp=8/20μs)
Protects four I/O Lines and one Vcc line
Low operating and clamping voltage
Ultra low capacitance: 0.3pF typical(I/O to I/O)
Low Leakage
Low operating voltage:5.0V
Solid-state silicon-avalanche technology
IEC COMPATIBILITY (EN61000-4)
IEC 61000-4-2 (ESD) ±18kV (air), ±12kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 5A (8/20μs)
Mechanical Characteristics Applications
JEDEC MSOP 10L package
Molding compound flammability rating: UL 94V-0
Marking: Marking Code and data code
Packaging: Tape and Reel
RoHS/WEEE Compliant
Packaging : Tape and Reel per EIA 481
Video/Graphics Card
Handheld & Portable Electronics
PC/Notebook USB2.0/IEEE1394 ports
10/100/1000 Ethernet
DVI interfaces
Wireless data (WAN/LAN) systems
evice Connection Options for Protection of Four High-Speed Data Lines
The WS05-4R4M TVS is designed to protect four data lines from transient over-voltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode VF) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry.
Flow Through Layout
The WS05-4R4M is designed for have ease of PCB layout by allowing the traces to run straight through the device. Figure 1 shows the proper way to design the PCB board trace in order to use the flow through layout for two line pairs. The solid line represents the PCB trace.
Note that the PCB traces are used to connect the pin pairs for each line (pin 1 to pin 10, pin 2 to pin 9, pin 4 to pin 7, pin 5 to pin 6). For example, line 1 enters at pin 1 and exits at Pin 10 and the PCB trace connects pin 1 and 10 together. This is true for lines 2, 3, and 4. Ground is conn
